Tuesday, 24 February 2015

Micro computer



Micro-computer
Micro-computer system
Block diagram of a microcomputer system
The block architecture of micro-computer consist of the following units

1. Arithmetic Logic Unit (ALU)
The arithmetic and logical unit (ALU) performs arithmetic operations such as
Addition, subtraction, multiplication, and or division, and logical operation such as
AND, OR, NOT and XOR needed to carry out the instructions.

2. Control Unit (CU)
The control unit (
CU) is responsible for fetching instructions from main memory and determining their type.


3. Memory Unit (MU)
The memory unit (MU) is used to store information such as number or character data.
By store we mean that the memory has the ability to hold this information for processing or for outputting at a later time.
The memory unit is divided into primary storage memory and secondary storage memory. Typically, Primary storage memory is implemented with semiconductor memories: read
-only memory (ROM) and random access read/write memory (RAM) integrated circuits. Secondary storage memory is used for long term storage of information that is not currently being used such as disk and CD ROM. 3 Semiconductor Memories
Rom (Read only memory)
By using ROM, the information is made nonvolatile; that is, the information is not lost if power is turned off. ROMs can be divided into:
1. Mask ROM
Mask ROMs cannot be changed or erased, internationally or otherwise. The data in a mask ROM are inserted during its manufacture, essentially by exposing a photosensitive material through a mask containing the desired bit pattern and then etching away the exposed or unexposed surface. The only way to change the program in a mask ROM is to replace the entire chip.

2. PROM
The PROM (Programmable) is like a mask ROM, except that it can be programmed once in the field.

3. EPROM
The EPROM (Erasable PROM) cannot only be field programmed but also field erased. When the quartz window in an EPROM is expressed to storage ultraviolet light for 15-20 minutes, all the bits are sets to 1. If many changes are expected during the design cycle, EPROMs are far more economical than PROMs because they can be reused.

4. EEPROM
The EEPROM (Electrically Erasable PROM) or E2PROM can be erased by applying pulses to it instead of requiring it to be put in a special chamber for exposure to ultraviolet light . The new type of ROM called Flash memory is similar to EEPROM in configuration. Flash memory can be programmed on a circuit board by the use of  ISP (In-System Programming).
RAM (Random access Memory)
By using RAM, the information is made volatile; that is, the information is lost if power is turned off. RAMs come into varieties: static and dynamic.
1. SRAM
SRAMs are constructed internally using circuits similar to the basic D latch. These memories have the property that their continents are retained as long as the power is kept on.

2. DRAM (Dynamic RAM)
DRAMs, in contrast, do not use latch –like circuits. Instead, a dynamic RAM is an array of tiny capacitors, each of which can be charged or discharged, allowing 0 and 1 to be stored. Because the electric charge tends to leak out, each bit in a dynamic RAM must be refreshed every few milliseconds to prevent the data from leaking away.
4
Because external logic must take care of the refreshing, dynamic RAMs require more complex interfacing than static ones, although in many applications this disadvantage is compensated for by their large capacities. Some dynamic RAMs have on-chip refresh logic, providing both high capacity and simple interfacing.
4. Input unit (IU)
The input unit (IU) is used to input the information to be processed from external input device such as a card reader, keyboard, or switch.
5. Output Unit (OU)
The output unit (OU) is used to output the processed results of computer to the external output devices such as a printer, monitor, 7-segment display, and LED.


2. The input/output unit, or usually just I/O unit, is a combination of input unit and output.
The central processing unit (CPU) is formed by combining the ALU and CU together.
The CPU is the brain of the microcomputer.
Input/
Output
Unit
Central
Processing
Unit
Memory
Unit
System Bus
Input/
Output
Unit
Central
Processing
Unit
Memory
Unit
System Bus

2 Three basic units of microcomputer system
A bus is a collection of wires used to transmit signals in parallel. According to the
purpose, the buses of a microcomputer can be divided into three types: address bus,
data bus, and control bus. Three buses are shown are shown 

3 System bus of microcomputer system
I/O
Port
Peripherals
CPU
Memory
Address Bus
Data Bus
Control Bus
I/O
Port
Peripherals
CPU
Memory
Address Bus
Data Bus
Control Bus
5
1. Address Bus
The unidirectional address bus transmits the address signals emitted from CPU to memory and I/O port.
2. Data Bus
The signal on the bidirectional data bus is the data either from CPU to memory and I/O or from memory and I/O to CPU.
3. Control Bus
The control bus is used to transmit the control signals such as read, write, and interrupt control signal.1 -2
Single-Chip Microcomputer
Microcomputer control system such as air-conditioner, clothes washer-dryer, and security system, etc. are widely used in our everyday life. How to build up a microcomputer control system? The earlier multi-chip 8088 solutions were initially replaced by highly integrated 8-bit single-chip microcomputer devices such as the 8048 and 8051. These devices were tailored to work best as event controllers. For instance, the 8051 offers one-order-of-magnitude higher performance than the 8088, a more powerful instruction set , and special on-chip function such as ROM,RAM, timer/counters, universal asynchronous receiver/transmitter (UART), programmable parallel I/O ports, DAC, and ADC. Today these types of single-chip microcomputers are also called microcontroller. The microcontrollers are widely used in industrial control systems as shown 

Single-chip microcomputer control system


Single-Chip Microcomputer Software
Instruction
Output
Components
Input
Components
Interrupt Control
Reset
Vcc

Single-Chip Microcomputer Software
Instruction
Output
Components
Input
Components
Interrupt Control
Single
-
Chip
Microcomputer
Software
Instruction
Output
Components
Input
Components
Interrupt Control
Reset Vcc
1.Clock Generator
Single-chip microcomputer is a sequential logic circuit normally driven by a clock generator, a device that emits a periodic sequence of pulses. These pulses define machine cycles. During each machine cycle, some activity occurs, such as the execution of an instruction.

2. CPU
The CPU is the brain of the single-chip microcomputer. Its function is to execute programs stored in the program memory by fetching their instructions, examining them, and then executing one after another. The CPU is composed of several distinct parts. The control unit is responsible for fetching instructions from program memory and determining their type. The ALU performs arithmetic and logical operations.

3. Interrupt control
Interrupt request signals may come from the on-chip peripheral such as timer/counter or external device such as keyboard. The interrupt control circuit receives these requests and determines which request is acknowledged according to the priority level specified.

4. Data Memory
The data memory or RAM is used to store data. A part of on-chip data memory is used to store temporary results and certain control information. This memory consists of a number of registers, each of which has a certain function.

5.  Program Memory
The program memory or ROM is used to store program instructions. IT is divided into the following categories: PROM, EPROM, EEPROM, and Flash.
Clock generator
 CPU
Internal Control
Data Memory
(RAM)
Program Memory
(ROM)
I/P Port
System Bus
Peripherals
____________________
Timer
UART
A/D Converter
D/A Converter
.
.
.
.
External
Interrupt
External
Components
Clock generator
CPU
Internal
Control
Data Memory
(RAM)
Program Memory
(ROM)
I/P Port
System Bus
System Bus
Peripherals
____________________
Timer
UART
A/D Converter
D/A Converter
.
.
.
.
External
Interrupt
External
Components
7
6
.
I/O Port
The I/O port is an interface between CPU and external devices such as switches and LEDs. Compared with genera
1-purpose microcomputers, single-chip microcomputers provide more I/O ports and more powerful instructions for I/O handling. The more the
I/O ports, the more I/O devices can be connected.
7. On-chip Peripherals
On-chip peripheral circuits are a single-chip microcomputer offer various special control functions such as timer/counters. Serial ports, PWM, even ADCs and DACs. In general, the more the on-chip peripheral, the higher the system performance.


8051 System Architecture
2-1 Introduction to 8051
The 8051 is the original chip of MCS-51 family devices which originated from Intel.
It evolved from the predecessor single-chip microcomputers 8048 and 8049, and therefore its software is upwardly compatible with these devices. The 8051 is a stand-alone, powerful 8-bit single-chip microcomputer and is commonly used for real-time control applications. Although Intel ceased the manufacture of MCS-51 devices, a wide variety of enhanced products based on the 8051 core is still designed and manufactured by other semiconductor manufactures. These devices, such as Atmel
AT89C51 and T89C51RX2 family devices and Philips P89C51RX+, P89C51RX2 and P89C66X family devices, are more powerful and more convenient for control applications.
The MTS-51 Microcomputer Trainer is equipped with the Philips
P89C51RX+/P89C51RX2 chip for the learning of 8051 core architecture and instructions. According to the type and space of internal program memory, the MCs-51 family devices are divided into the following versions:
1. ROM less version
The devices such as 8031 have no internal program memory. External ROMs are required for storing the instruction code.
2. Mask ROM version
The code and data in a mask-ROM 8051 are inserted during its manufacture, so that it cannot be changed or erased, intentionally or otherwise.
3. PROM version
The PROM-based 8051 also called OTP (One Time Programming) version because its program memory can be programmed once in the field.
4. EPROM version
The EPROM-based version is named as 8751. It can not only be field-programmed but also field-erased. During the design cycle, EPROM 8751is far more economical than PROM 8051 because it can be used.5. 8052
These family devices are based on the 8051 core with twice the memory space and an extra timer/counter. The 8052 family devices include ROM less 8032, PROM 8052, and EPROM 8752.9

v  The features of Atmel AT89C51/AT89C52 family include:
1. AT89C51 can replace 8751 and AT89C52 can replace 8752.
2. EEPROM program memory.
3. Operating frequency up to 24MHz twice the conventional 8051.
4. Three programmable lock bits.
5. Output driving capability lower than HMOS-based 8051.
6. 20-pin AT89C2051 and AT89C1051 provide less I/O pins and memory space to suit for small systems. Philips P80c51 family products include ROM less devices P80C31/80C32, Mask
ROM devices P8C51/52/54/58, OTP devices P87C51/52/54/58, and Flash memory devices P89C51/52/54/58. The operating frequency of these devices can be up to 33 MHz The device P89C51,
C52, C54, and C58 contain 4K, 8K, 16K, and 32K bytes of on-chip ROM and 128, 256, 256, and 256 bytes of on-chip RAM, respectively.

v  The features of Intel 8051 family include:
1. 8-bit CPU optimized for control applications.
2. Extensive Boolean processing (single-bit logic) capabilities.
3. 128 bytes of on-chip RAM (256 bytes for 8052).
4. 4K bytes of on-chip ROM (8K bytes for 8052).
5. 32 bidirectional and individually addressable I/O lines.
6. Two 16-bit timer/counters (three for 8052).
7. Full duplex UART.
8. two-level priority interrupts.
9. 5 interrupt sources including 2 external interrupts and 3 internal interrupts (UART and 2 timer/counters); 6 interrupts sources for 8052.
10. 64K program memory addresses space.
11. 64K data memory addresses space.
12. On-chip clock oscillator can operate up to 12 MHz.
13. Maximum system memory up to 128KB plus internal data memory.
14. CHMOS devices (80C51BH, 80C31BH, 87C51, 80C52, 80C32, 87C52) have two programmable power-saving modes: Idle and Power Down modes. In Idle mode, the CPU is turned off while the RAM and other on-chip peripherals continue operating. In this mode current draw is reduced to about 15% of the current draw when the device is fully active. In Power Down mode, all on-chip activities are suspended and on-chip


In general, all CPUs, single-chip microprocessors or multi-chip implementations run programs by performing the following steps:
  1. Read an instruction and decode it
  2. Find any associated data that is needed to process the instruction
  3. Process the instruction
  4. Write the results out

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